* Coding Style
- next_state is complemented by case statements, combinational logic
- curr_state is F/F output of next_state
- Above 2 things can be combined into one procedure block
- localparam(parameter) is used for state encoding


- Verilog code
* https://github.com/Vamosssss/Basic/tree/main/07.%20FSM/01-1.%20FSM%202%20Design%20Style
'Verilog HDL > Basics' 카테고리의 다른 글
| 09-3. FSM(Finite State Machine) Transition통합, 분리 (0) | 2024.10.07 |
|---|---|
| 09-2. FSM(Finite State Machine) Typiclal Design (0) | 2024.10.07 |
| 09. FSM (Finite State Machine) (2) | 2024.10.06 |
| 08. Pipeline (1) | 2024.10.06 |
| 07. Counter (0) | 2024.10.06 |